Publications
Conference Papers and Posters
[C64]. M. Anastasova, R. Azarderakhsh, and M. Mozaffari Kermani, "Fully Hybrid TLSv1.3 in WolfSSL on Cortex-M4," in Proc. ACNS, accepted, 2024.
[C63]. S. Aghapour, K. Ahmadi, R. Azarderakhsh, and M. Mozaffari Kermani, "Efficient Fault Detection Architectures for Modular Exponentiation Targeting Cryptographic Applications Benchmarked on FPGAs," in Proc. ISCAS, not presented, accepted, 2024.
[C62]. R. Karam, S. Katkoori, and M. Mozaffari Kermani, "Engaged student learning with gamified labs: A new approach to hardware security education," in Proc. IEEE TALE, Dec. 2023.
[C61]. A. Cintas Canto, R. Azarderakhsh, and M. Mozaffari Kermani, "Reliable code-based post-quantum cryptographic algorithms through fault detection on FPGA," in Proc. NorCAS, pp. 1-5, Nov. 2023.
[C60]. M. Anastasova, R. El Khatib, A. Laclaustra, R. Azarderakhsh, and M. Mozaffari Kermani, "Highly optimized Curve448 and Ed448 design in wolfSSL and side-channel evaluation on Cortex-M4," in Proc. DSC, to appear 2023.
[C59]. M. Anastasova, R. Azarderakhsh, and M. Mozaffari Kermani, "Optimal and Side-Channel resistant Post-Quantum TLS1.3 as part of wolfSSL for ARMv7-M," in Proc. CHES, poster, Aug. 2023.
[C58]. D. Owens, R. El Khatib, M. Bisheh-Niasar, R. Azarderakhsh, and M. Mozaffari Kermani, "Efficient and side-channel resistant Ed25519 on ARM Cortex-M4," in Proc. SSH-SoC at DAC 2023, May 2023.
[C57]. M. Anastasova, R. Azarderakhsh, M. Mozaffari Kermani, and L. Beshaj, "Time-efficient finite field microarchitecture design for Curve448 and Ed448 on Cortex-M4," in Proc. NEHWS, Apr. 2023.
[C56]. R. Karam, S. Katkoori, M. Mozaffari Kermani, "Improving Student Learning in Hardware Security: Project Vision, Overview, and Experiences," in Proc. IEEE-iSES, pp. 297-301, Dec. 2022.
[C55]. M. Anastasova, R. Azarderakhsh, M. Mozaffari Kermani, and L. Beshaj, "Time-efficient finite field microarchitecture design for Curve448 and Ed448 on Cortex-M4," in Proc. ICISC, pp 292-314, Mar. 2022 (Best Paper Award).
[C54]. A. Cintas Canto, R. Azarderakhsh, M. Mozaffari Kermani, and K. Gaj, "CRC-oriented error detection architectures of post-quantum cryptography Niederreiter key generator on FPGA," in Proc. NorCAS, pp. 1-7, Oct. 2022.
[C53]. M. Anastasova, R. Azarderakhsh, and M. Mozaffari Kermani, "Time-optimal design of finite field arithmetic for SIKE on Cortex-M4," in Proc. WISA, pp. 265-276, Aug. 2022.
[C52]. M. Anastasova, M. Bisheh-Niasar, H. Seo, R. Azarderakhsh, and M. Mozaffari Kermani, "Efficient and side-channel resistant design of high-security Ed448 on ARM Cortex-M4," in Proc. IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 93-96, Jun. 2022.
[C51]. R. Karam, S. Katkoori, M. Mozaffari Kermani, "Work-in-Progress: HyFlex Hands-On Hardware Security Education During COVID-19," in Proc. IEEE World Engineering Education Conference, pp. 1-4, Mar. 2022.
[C50]. M. Anastasova, M. Bisheh-Niasar, R. Azarderakhsh, and M. Mozaffari Kermani, "Compressed SIKE Round 3 on ARM Cortex-M4," in Proc. EAI SecureComm (PQC), pp. 441-457, Dec. 2021.
[C49]. P. Sanal, E. Karagoz, H. Seo, R. Azarderakhsh, and M. Mozaffari-Kermani, "Kyber on ARM64: Compact implementations of Kyber on 64-bit ARM Cortex-A processors," in Proc. EAI SecureComm (PQC), pp. 424-440, Dec. 2021.
[C48]. M. Bisheh-Niasar, R. Azarderkhsh, and M. Mozaffari Kermani, "A monolithic hardware implementation of Kyber: Comparing apples to apples in PQC candidates," in Proc. Latincrypt, pp. 108-126, Sep. 2021.
[C47]. M. Bisheh-Niasar, R. Azarderkhsh, and M. Mozaffari Kermani, "High-speed NTT-based polynomial multiplication accelerator for post-quantum cryptography," in Proc. ARITH, pp. 94-101, 2021.
[C46]. R. El Khatib, R. Azarderkhsh, and M. Mozaffari Kermani, "Accelerated RISC-V for SIKE," in Proc. ARITH, pp. 131-138, 2021.
[C45]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Hardware constructions for error detection of lattice-based cryptosystems utilized in secure post-quantum cryptographic architectures," in Proc. Hardware-Oriented Security and Trust (HOST), poster, Dec. 2020.
[C44]. M. Bishe Niasar, R. Azarderkhsh, and M. Mozaffari Kermani, "Efficient hardware implementations for elliptic curve cryptography over Curve448," in Proc. INDOCRYPT, pp. 228-247, Dec. 2020.
[C43]. M. Bishe Niasar, R. Azarderkhsh, M. Mozaffari Kermani, and R. El Khatib, "Fast, small, and area-time efficient architectures for key-exchange on Curve25519," in Proc. ARITH, pp. 72-79, Jun. 2020.
[C42]. R. El Khatib, R. Azarderkhsh, and M. Mozaffari Kermani, "Highly optimized Montgomery multiplier for SIKE primes on FPGA," in Proc. ARITH, pp. 64-71, Jun. 2020.
[C41]. R. El Khatib, R. Azarderkhsh, and M. Mozaffari Kermani, "Optimized algorithms and architectures for Montgomery multiplication for post-quantum cryptography," in Proc. CANS, pp. 83-98, July 2019.
[C40]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Hardware constructions for error detection of number-theoretic transform utilized in secure cryptographic architectures," in Proc. WISE Workshop at Hardware-Oriented Security and Trust (HOST), poster, May 2019.
[C39]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Hardware constructions for error detection of number-theoretic transform utilized in secure cryptographic architectures," in Florida Institute for Cybersecurity Conference, poster, Mar. 2019 (Best Student Poster Award).
[C38]. F. Tehranipoor, N. Karimian, M. Mozaffari Kermani, and H. Mahmoodi, "Deep RNN-oriented paradigm shift through BOCANet: Broken obfuscated circuit attack," in Proc. GLSVLSI, pp. 335-338, May 2019.
[C37]. A. Jalali, R. Azarderakhsh, M. Mozaffari Kermani, and D. Jao, "Towards optimized and constant-time CSIDH on embedded devices," in Proc. Constructive Side-Channel Analysis and Secure Design (COSADE), pp. 215-231, Apr. 2019.
[C36]. M. Mozaffari Kermani, S. Bayat-Sarmadi, A-Bon Ackie, and R. Azarderakhsh, "High-performance fault diagnosis schemes for efficient hash algorithm BLAKE," in Proc. IEEE Latin American Symp. Circuits and Systems, pp. 201-204, Feb. 2019.
[C35]. A. Jalali, R. Azarderakhsh, and M. Mozaffari Kermani, "NEON SIKE: Supersingular isogeny key encapsulation on ARMv7," in Proc. Int. Conf. Security, Privacy, and Applied Cryptography Engineering (SPACE), pp. 37-51, Dec. 2018.
[C34]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Thwarting active side-channel attacks of ring polynomial multiplication in Z/pZ[x]/x^n+1 for post-quantum cryptography benchmarked on ASIC," in Proc. Cryptographic Hardware and Embedded Systems (CHES), poster, Sep. 2018.
[C33]. A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, "Design-for-error-detection in implementations of cryptographic nonlinear substitution boxes benchmarked on ASIC," in Proc. IEEE Int. Midwest Symp. on Circuits and Systems, pp. 574-577, Aug. 2018.
[C32]. M. Mozaffari Kermani, A. Jalali, and R. Azarderakhsh, "Lightweight error detection architectures through swapping the shares for a subset of S-Boxes," in Proc. IEEE Int. Midwest Symp. on Circuits and Systems, pp. 578-581, Aug. 2018.
[C31]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Active side-channel attack countermeasures for ring polynomial multiplication in post-quantum cryptography," in Proc. WISE Workshop at Hardware-Oriented Security and Trust (HOST), poster, May 2018.
[C30]. A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, "Comparative realization of error detection schemes for implementations of MixColumns in lightweight cryptography," in Proc. ACM Conf. Computing Frontiers, pp. 200-203, May 2018.
[C29]. M. Mozaffari Kermani, R. Azarderakhsh, and S. Bayat-Sarmadi, "Reliable hardware architectures for efficient secure hash functions ECHO and Fugue," in Proc. ACM Conf. Computing Frontiers, pp. 204-207, May 2018.
[C28]. A. Jalali, R. Azarderakhsh, and M. Mozaffari Kermani, "Efficient post-quantum undeniable signature on 64-bit ARM," in Proc. Conf. Selected Areas in Cryptography (SAC), pp. 281-298, Dec. 2017.
[C27]. A. Jalali, R. Azarderakhsh, and M. Mozaffari Kermani, "Efficient implementation of supersingular isogeny Diffie-Hellman key exchange on ARM processors," in Proc. ACM Symp. High-Performance Parallel and Distributed Computing, poster, Jun. 2017.
[C26]. A. Jalali, R. Azarderakhsh, and M. Mozaffari Kermani, "Efficient implementation of isogeny-based Diffie-Hellman key exchange on ARM processors," in Florida Institute for Cybersecurity Conference, poster, Mar. 2017 (Best Student Poster Award).
[C25]. M. Mozaffari Kermani, R. Azarderakhsh, and J. Xie, "Error detection reliable architectures of Camellia block cipher applicable to different variants of its substitution boxes," in Proc. IEEE Asian Hardware Oriented Security and Trust Symposium (AsianHOST), pp. 1-6, 2016.
[C24]. B. Koziel, R. Azarderakhsh, A. Jalali, D. Jao, and M. Mozaffari Kermani, "NEON-SIDH: Efficient implementation of supersingular isogeny Diffie-Hellman key exchange protocol on ARM," in Proc. Conf. Cryptology and Network Security (CANS), pp. 88-103, 2016.
[C23]. B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, "Fast hardware architectures for supersingular isogeny Diffie-Hellman key exchange on FPGA," in Proc. Int. Conf. (INDOCRYPT), pp. 191-206, 2016.
[C22]. B. Koziel, R. Azarderakhsh, D. Jao, and M. Mozaffari Kermani, "On fast calculation of addition chains for isogeny-based cryptography," in Proc. Inscrypt, pp. 323-342, 2016.
[C21]. M. Mozaffari Kermani and R. Azarderakhsh, "Lightweight hardware architectures for fault diagnosis schemes of efficiently-maskable cryptographic substitution boxes," in Proc. IEEE Int. Conf. ICECS, pp. 764-767, 2016.
[C20]. A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, "Fault diagnosis schemes for secure lightweight cryptographic block cipher RECTANGLE benchmarked on FPGA," in Proc. IEEE Int. Conf. ICECS, pp. 768-771, 2016.
[C19]. B. Koziel, R. Azarderakhsh, D. Jao, and M. Mozaffari-Kermani, "On fast calculation of addition chains for isogeny-based cryptography," in Proc. eprint 2016/1045, pp. 1-20, 2016.
[C18]. B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, "Fast hardware architectures for supersingular Isogeny Diffie-Hellman key exchange on FPGA," in Proc. eprint 2016/1044, pp. 1-17, 2016.
[C17]. M. Mozaffari Kermani, R. Azarderakhsh, and M. Mirakhorli, "Multidisciplinary approaches and challenges in integrating emerging medical devices security research and education," in Proc. Conf. American Society for Engineering Education, pp. 1-13, June 2016, available here or here.
[C16]. M. Mozaffari Kermani, R. Ramadoss, and R. Azarderakhsh, "Efficient error detection architectures for CORDIC through recomputing with encoded operands," in Proc. IEEE Int. Symp. Circuits and Systems (ISCAS), pp. 2154--2157, May 2016.
[C15]. B. Koziel, R. Azarderakhsh, M. Mozaffari Kermani, and D. Jao, "Post-quantum cryptography on FPGA based on Isogenies on elliptic curves," in Proc. eprint 2016/672, pp. 1-18, 2016.
[C14]. R. Azarderakhsh, B. Koziel, A. Jalali, M. Mozaffari Kermani, and D. Jao, "NEON-SIDH: Efficient implementation of supersingular isogeny Diffie-Hellman key-exchange protocol on ARM," in Proc. eprint 2016/669, pp. 1-16, 2016.
[C13]. B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, "Low-resource and fast binary Edwards curves cryptography using Gaussian normal basis," in Proc. Int. Conf. (INDOCRYPT), pp. 347-369, Dec. 2015.
[C12]. M. Mozaffari Kermani and R. Azarderakhsh, "Reliable hash trees for post-quantum stateless cryptographic hash-based signatures," in Proc. IEEE Int. Symp. Defect and Fault Tolerance in VLSI Systems (DFT), pp. 103-108, Oct. 2015.
[C11]. M. Mozaffari Kermani and R. Azarderakhsh, "Integrating emerging cryptographic engineering research and security education," in Proc. Conf. American Society for Engineering Education, pp. 1-13, June 2015, available here or through this link.
[C10]. C. E. Kennedy and M. Mozaffari Kermani, "Generalized parallel CRC computation on FPGA," in Proc. IEEE Conf. Elec. Comput. Eng., pp. 107-113, May 2015.
[C9]. M. Mozaffari Kermani, M. Zhang, A. Raghunathan, and N. K. Jha, “Emerging Frontiers in Embedded Security,” in Proc. IEEE Int. Conf. VLSI Design, pp. 203-208, Jan. 2013.
[C8]. M. Zhang, M. Mozaffari Kermani, A. Raghunathan, and N. K. Jha, “Energy-Efficient and Secure Sensor Data Transmission Using Encompression,” in Proc. IEEE Int. Conf. VLSI Design, pp. 31-36, Jan. 2013.
[C7]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "Reliable Hardware Architectures for the Third-Round SHA-3 Finalist Grostl Benchmarked on FPGA Platform," in Proc. IEEE Int. Symp. Defect and Fault Tolerance in VLSI Systems (DFT), pp. 325-331, Vancouver, Canada, Oct. 2011.
[C6]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "A High-Performance Fault Diagnosis Approach for the AES SubBytes Utilizing Mixed Bases," in Proc. IEEE Workshop Fault Diagnosis and Tolerance in Cryptography (FDTC), pp. 80-87, Nara, Japan, Sep. 2011.
[C5]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "A Low-Cost S-box for the Advanced Encryption Standard Using Normal Basis," in Proc. IEEE Int. Conf. Electro/Information Technology (EIT), pp. 52-55, Windsor, Canada, Jun. 2009 (Invited paper).
[C4]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis," in Proc. LNCS Cryptographic Hardware and Embedded Systems (CHES), pp. 113-129, Washington, D.C., USA, Aug. 2008 (Blind-reviewed, Acceptance ratio: 25%).
[C3]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "A Structure-independent Approach for Fault Detection Hardware Implementations of the Advanced Encryption Standard," in Proc. IEEE Workshop Fault Diagnosis and Tolerance in Cryptography (FDTC), pp. 47-53, Vienna, Austria, Sep. 2007.
[C2]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "Parity-based Fault Detection Architecture of S-box for Advanced Encryption Standard," in Proc. IEEE Int. Symp. Defect and Fault Tolerance in VLSI Systems (DFT), pp. 572-580, Washington, D.C., USA, Oct. 2006.
[C1]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "Parity Prediction of S-box for AES," in Proc. IEEE Canadian Conference on Electrical and Computer Engineering (CCECE), pp. 2357--2360, Ottawa, Canada, May 2006.