• Home
• Research
• Publications
  • Journal Articles
  • Conference Papers
  • Preprint Papers and Archives
  • IEEE/ACM Transactions Editorials
• Research Group
• Teaching
• Honors and Awards
• Professional Activities
• Outreach

Publications

Note: List below is for published articles and does not include accepted articles that are yet to be published.

Copyright note: All the papers below have been copyrighted to the IEEE or the ACM. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE or the ACM.

Published Journal Articles

[J63]. K. Ahmadi, S. Aghapour, M. Mozaffari Kermani, and R. Azarderakhsh, "Efficient error detection cryptographic architectures benchmarked on FPGAs for Montgomery Ladder," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 32, no. 11, pp. 2154-2158, Nov. 2024.

[J62]. S. Aghapour, K. Ahmadi, M. Anastasova, M. Mozaffari Kermani, and R. Azarderakhsh, "PUF-Kyber: Design of a PUF-Based Kyber Architecture Benchmarked on Diverse ARM Processors," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 43, no. 12, pp. 4453-4462, Dec. 2024.

[J61]. D. Owens, M. Mozaffari Kermani, and R. Azarderakhsh, "Efficient and side-channel resistant Ed25519 on ARM Cortex-M4," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 71, no. 6, pp. 2674-2686, June 2024.

[J60]. K. Ahmadi, S. Aghapour, M. Mozaffari Kermani, and R. Azarderakhsh, "Efficient error detection schemes for ECSM window method benchmarked on FPGAs," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 32, no. 3, pp. 592-596, Mar. 2024.

[J59]. J. Kaur, A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, "Hardware constructions for error detection in WG-29 stream cipher benchmarked on FPGA," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 43, no. 4, pp. 1307-1311, Apr. 2024.

[J58]. R. Elkhatib, B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, "Cryptographic engineering a fast and efficient SIKE in FPGA," ACM Transactions on Embedded Computing Systems, vol. 23, no. 2, pp. 1-25, Mar. 2024.

[J57]. A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, "Reliable architectures for finite field multipliers using cyclic codes on FPGA utilized in classic and post-quantum cryptography," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 1, no. 31, pp. 157-161, Jan. 2023.

[J56]. A. Sarker, A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, "Error detection architectures for hardware/software co-design approaches of number theoretic transform," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 42, no. 7, pp. 2418-2422, Jul. 2023.

[J55]. A. Cintas Canto, A. Sarker, J. Kaur, M. Mozaffari Kermani, and R. Azarderakhsh, "Error detection schemes assessed on FPGA for multipliers in lattice-based key encapsulation mechanisms in post-quantum cryptography," IEEE Transactions on Emerging Topics in Computing, vol. 11, no. 3, pp. 791-797, July-Sept. 2023.

[J54]. A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, "Error detection constructions for ITA finite field inversions over GF(2^m) on FPGA using CRC and hamming codes," IEEE Transactions on Reliability, vol. 72, no. 2, pp. 651-661, Jun. 2023.

[J53]. A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, "Reliable constructions for the key generator of code-based post-quantum cryptosystems on FPGA," ACM Emerging Technologies in Computing Systems (special issue on CAD for Hardware Security), vol. 29, no. 1, pp. 5:1-5:20, Jan. 2023.

[J52]. R. Elkhatib, B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, "Accelerated RISC-V for post-quantum SIKE," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 69, no. 6, pp. 2490-2501, Jun. 2022.

[J51]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Efficient error detection architectures for post quantum signature Falcon's sampler and KEM SABER," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 30, no. 6, pp. 794-802, Jun. 2022.

[J50]. J. Kaur, M. Mozaffari Kermani, and R. Azarderakhsh, "Hardware constructions for lightweight cryptographic block cipher QARMA with error detection mechanisms," IEEE Transactions on Emerging Topics in Computing, vol. 10, no. 1, pp. 514-519, Mar. 2022.

[J49]. J. Kaur, M. Mozaffari Kermani, and R. Azarderakhsh, "Hardware constructions for error detection in lightweight authenticated cipher ASCON benchmarked on FPGA," IEEE Transactions on Circuits and Systems II, vol. 69, no. 4, pp. 2276-2280, Apr. 2022.

[J48]. J. Kaur, A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Hardware constructions for error detection in lightweight Welch-Gong (WG)-oriented streamcipher WAGE benchmarked on FPGA," IEEE Transactions on Emerging Topics in Computing, vol. 10, no. 2, pp. 1208-1215, Jun. 2022.

[J47]. R. ElKhatib, R. Azarderakhsh, and M. Mozaffari Kermani, "High-performance FPGA accelerator for SIKE," IEEE Transactions on Computers, vol. 71, no. 6, pp. 1237-1248, Jun. 2022.

[J46]. M. Bisheh Niasar, R. Azarderakhsh, and M. Mozaffari Kermani, "Instruction-set accelerated implementation of CRYSTALS-Kyber," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 68, no. 11, pp. 4648-4659, Nov. 2021.

[J45]. M. Anastasova, R. Azarderakhsh, and M. Mozaffari-Kermani, "Fast strategies for the implementation of SIKE Round 3 on ARM Cortex-M4," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 68, no. 10, pp. 4129-4141, Oct. 2021.

[J44]. M. Bisheh Niasar, R. Azarderakhsh, and M. Mozaffari Kermani, "Cryptographic accelerators for digital signature based on Ed25519," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 29, no. 7, pp. 1297-1305, Jul. 2021.

[J43]. M. Bisheh Niasar, R. Azarderakhsh, and M. Mozaffari Kermani, "Area-time efficient hardware architecture for signature based on Ed448," IEEE Transactions on Circuits and Systems II, vol. 68, no. 8, pp. 2942-2946, Aug. 2021.

[J42]. A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, "CRC-based error detection constructions for FLT and ITA finite field inversions over GF(2^m)," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 29, no. 5, pp. 1033-1037, May 2021.

[J41]. A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, "Reliable CRC-based error detection constructions for finite field multipliers with applications in cryptography," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 29, no. 1, pp. 232-236, Jan. 2021.

[J40]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Fault detection architectures for inverted binary Ring-LWE construction benchmarked on FPGA," IEEE Transactions on Circuits and Systems II, vol. 68, no. 4, pp. 1403-1407, Apr. 2021.

[J39]. Book Chapter: B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, "Post-Quantum Cryptographic Hardware and Embedded Systems," Emerging Topics in Hardware Security, Editor: Mark Tehranipoor, Springer Nature, Mar. 2021.

[J38]. A. Cintas Canto, M. Mozaffari Kermani, and R. Azarderakhsh, "Reliable architectures for composite-field-oriented constructions of McEliece post-quantum cryptography on FPGA," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 40, no. 5, pp. 999-1003, May 2021.

[J37]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Error detection architectures for ring polynomial multiplication and modular reduction of Ring-LWE in Z=pZ[x]/xn+1 benchmarked on ASIC," IEEE Transactions on Reliability, vol. 70, no. 1, pp. 362-370, Mar. 2021.

[J36]. B Koziel, A-Bon Ackie, R. El Khatib, R. Azarderakhsh, and M. Mozaffari-Kermani, "SIKE'd Up: Fast and secure hardware architectures for supersingular Isogeny key encapsulation," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 67, no. 12, Dec. 2020.

[J35]. M. Mozaffari Kermani and R. Azarderakhsh, "Reliable architecture-oblivious error detection schemes for secure cryptographic GCM structures," IEEE Transactions on Reliability, vol. 68, no. 4, pp. 1347-1355, Dec. 2019.

[J34]. A. Jalali, R. Azarderakhsh, M. Mozaffari Kermani, M. Campagna, and D. Jao, "ARMv8 SIKE: Optimized supersingular isogeny key encapsulation on ARMv8 processors," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 16, no. 11, pp. 4209-4218, Nov. 2019.

[J33]. A. Jalali, R. Azarderakhsh, M. Mozaffari Kermani, and D. Jao, "Supersingular Isogeny Diffie-Hellman key exchange on 64-bit ARM," IEEE Transactions on Dependable and Secure Computing, vol. 16, no. 5, pp. 902-912, Sep./Oct. 2019.

[J32]. A. Sarker, M. Mozaffari Kermani, and R. Azarderakhsh, "Hardware constructions for error detection of number-theoretic transform utilized in secure cryptographic architectures," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 27, no. 3, pp. 738-741, Mar. 2019.

[J31]. B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, "A high-performance and scalable hardware architecture for isogeny-based cryptography," IEEE Transactions on Computers (special issue on Cryptographic Engineering in a Post-Quantum World), vol. 67, no. 11, pp. 1594-1606, Nov. 2018.

[J30]. M. Mozaffari Kermani, R. Azarderakhsh, A. Sarker, and A. Jalali, "Efficient and reliable error detection architectures of Hash-Counter-Hash tweakable enciphering schemes," ACM Transactions on Embedded Computing Systems, vol. 17, no. 2, pp. 54:1-54:19, May 2018.

[J29]. A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, "Reliable and fault diagnosis architectures for hardware and software-efficient block cipher KLEIN benchmarked on FPGA," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 37, no. 4, pp. 901-905, Apr. 2018.

[J28]. M. Mozaffari Kermani, A. Jalali, R. Azarderakhsh, J. Xie, and R. Choo, "Reliable inversion in GF(2^8) with redundant arithmetic for secure error detection of cryptographic architectures," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 37, no. 3, pp. 696-704, Mar. 2018.

[J27]. S. Subramanian, M. Mozaffari Kermani, R. Azarderakhsh, and M. Nojoumian, "Reliable hardware architectures for cryptographic block ciphers LED and HIGHT," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 36, no. 10, pp. 1750-1758, Oct. 2017.

[J26]. P. Ahir, M. Mozaffari Kermani, and R. Azarderakhsh, "Lightweight architectures for reliable and fault detection Simon and Speck cryptographic algorithms on FPGA," ACM Transactions on Embedded Computing Systems, vol. 16, no. 4, pp. 109:1-109:17, Sep. 2017.

[J25]. R. Ramadoss, M. Mozaffari Kermani, and R. Azarderakhsh, "Reliable hardware architectures of CORDIC algorithm with fixed-angle of rotations," IEEE Transactions on Circuits and Systems II, vol. 64, no. 8, Aug. 2017 (among most popular articles, Aug. 2017).

[J24]. A. Aghaie, M. Mozaffari Kermani, and R. Azarderakhsh, "Fault diagnosis schemes for low-energy block cipher Midori benchmarked on FPGA," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 25, no. 4, pp. 1528-1536, Apr. 2017.

[J23]. P. Chen, S. N. Basha, M. Mozaffari Kermani, R. Azarderakhsh, and J. Xie, "FPGA realization of low register systolic all-one-polynomial multipliers over GF(2^m) and their applications in trinomial multipliers," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 25, no. 2, pp. 725-734, Feb. 2017.

[J22]. B. Koziel, R. Azarderakhsh, and M. Mozaffari Kermani, "Post-quantum cryptography on FPGA based on Isogenies on elliptic curves," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 64, no. 1, pp. 86-99, Jan. 2017 (among most popular articles, Jan. 2017).

[J21]. M. Mozaffari Kermani, V. Singh, and R. Azarderakhsh, "Reliable low-latency Viterbi algorithm architectures benchmarked on ASIC and FPGA," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 64, no. 1, pp. 208-216, Jan. 2017.

[J20]. M. Mozaffari Kermani, R. Azarderakhsh, and A. Aghaie, "Fault detection architectures for post-quantum cryptographic stateless hash-based secure signatures benchmarked on ASIC," ACM Transactions on Embedded Computing Systems (special issue on Embedded Device Forensics and Security: State of the Art Advances), vol. 16, no. 2, pp. 59:1-19, Dec. 2016.

[J19]. M. Mozaffari Kermani, R. Azarderakhsh, and A. Aghaie, "Reliable and error detection architectures of Pomaranch for false-alarm-sensitive cryptographic applications," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 23, no. 12, pp. 2804--2812, Dec. 2015.

[J18]. M. Mozaffari Kermani, S. Sur-kolay, A. Raghunathan, and N. K. Jha, "Systematic poisoning attacks on and defenses for machine learning in healthcare," IEEE Transactions on Information Technology in Biomedicine, vol. 19, no. 6, pp. 1893-1905, Nov. 2015.

[J17]. R. Azarderakhsh and M. Mozaffari Kermani, "High-performance two-dimensional finite field multiplication and exponentiation for cryptographic applications," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 34, no. 10, pp. 1569-1576, Oct. 2015.

[J16]. R. Azarderakhsh, M. Mozaffari Kermani, S. Bayat-Sarmadi, and C. Lee, "Systolic Gaussian normal basis multiplier architectures suitable for high-performance applications," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 23, no. 9, pp. 1969-1972, Sep. 2015.

[J15]. A. Mohsen-nia, M. Mozaffari Kermani, S. Sur-kolay, A. Raghunathan, and N. K. Jha, "Energy-efficient long-term continuous personal health monitoring," IEEE Transactions on Multi-Scale Computing Systems, vol. 1, no. 2, Apr. 2015 (spotlight article for Special Issue on Wearables, Implants, and Internet of Things).

[J14]. M. Mozaffari Kermani, N. Manoharan, and R. Azarderakhsh, "Reliable radix-4 complex division for fault-sensitive applications," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 34, no. 4, pp. 656-667, Apr. 2015.

[J13]. R. Azarderakhsh, M. Mozaffari Kermani, and K. U. Jarvinen, "Secure and efficient architectures for single exponentiation in finite field suitable for high-performance cryptographic applications," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 34, no. 3, pp. 332-340, Mar. 2015.

[J12]. M. Mozaffari Kermani, K. Tian, R. Azarderakhsh, and S. Bayat-Sarmadi, "Fault-resilient lightweight cryptographic block ciphers for secure embedded systems," IEEE Embedded Systems, vol. 6, no. 4, pp. 89-92, Dec. 2014 (among most popular articles, Dec. 2014).

[J11]. S. Bayat-Sarmadi, M. Mozaffari Kermani, and A. Reyhani-Masoleh, "Efficient and concurrent reliable realization of the secure cryptographic SHA-3 algorithm," IEEE Transactions on Computer-Aided Design Integr. Circuits Syst., vol. 33, no. 7, pp. 1105-1109, Jul. 2014.

[J10]. J. Pan, R. Azarderakhsh, M. Mozaffari Kermani, C. Lee, C. Chiou, and J. Lin, "Low latency digit-serial systolic double basis multiplier over GF(2^m) using subquadratic Toeplitz Matrix-Vector product approach," IEEE Transactions on Computers, vol. 63, no. 5, pp. 1169-1181, May 2014.

[J9]. M. Mozaffari Kermani, R. Azarderakhsh, C. Lee, and S. Bayat-Sarmadi, "Reliable concurrent error detection architectures for extended Euclidean-based division over GF(2^m)," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 22, no. 5, pp. 995--1003, May 2014.

[J8]. R. Azarderakhsh, K. U. Jarvinen, and M. Mozaffari Kermani, "Efficient algorithm and architecture for elliptic curve cryptography for extremely constrained secure applications," IEEE Transactions on Circuits and Systems I, Reg. Papers, vol. 61, no. 4, pp. 1144-1155, Apr. 2014.

[J7]. S. Bayat-Sarmadi, M. Mozaffari Kermani, R. Azarderakhsh, and C. Lee, "Dual basis super-serial multipliers for secure applications and lightweight cryptographic architectures," IEEE Transactions on Circuits and Systems II, Exp. Briefs, vol. 61, no. 2, pp. 125-129, Feb. 2014.

[J6]. M. Mozaffari Kermani and R. Azarderakhsh, "Efficient Fault Diagnosis Schemes for Reliable Lightweight Cryptographic ISO/IEC Standard CLEFIA Benchmarked on ASIC and FPGA," IEEE Transactions on Industrial Electronics, vol. 60, no. 12, pp. 5925--5932, Dec. 2013.

[J5]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "Efficient and High-Performance Parallel Hardware Architectures for the AES-GCM," IEEE Transactions on Computers, vol. 61, no. 8, pp. 1165-1178, Aug. 2012.

[J4]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "A Low-Power High-Performance Concurrent Fault Detection Approach for the Composite Field S-box and Inverse S-box," IEEE Transactions on Computers, vol. 60, no. 9, pp. 1327-1340, Sep. 2011 (special issue on Concurrent On-Line Testing and Error/Fault Resilience of Digital Systems).

[J3]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "A Lightweight High-Performance Fault Detection Scheme for the Advanced Encryption Standard Using Composite Fields," IEEE Transactions on Very Large Scale Integrated (VLSI) Systems, vol. 19, no. 1, pp. 85-91, Jan. 2011.

[J2]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "Concurrent Structure-Independent Fault Detection Schemes for the Advanced Encryption Standard," IEEE Transactions on Computers, vol. 59, no. 5, pp. 608-622, May 2010 (special issue on System Level Design of Reliable Architectures).

[J1]. M. Mozaffari Kermani and A. Reyhani-Masoleh, "Fault Detection Structures of the S-boxes and the Inverse S-boxes for the Advanced Encryption Standard," J. Electronic Testing: Theory and Applications (JETTA), vol. 25, no. 4, pp. 225-245, Aug. 2009.