.
Subjects |
Reading |
Course Overview and Introduction
|
Getting Started with Vivado
Vivado Design Suite User Guide --
Getting Started
BZedboard Hardware User's Guide
Zynq-7000 SoC Technical Reference Manual, Chapter 1
|
VHDL: Fundamentals |
Chapter 1, Chu's book
Xilinx XST VHDL Support
numeric_std package
|
VHDL: Modeling of Combinational Circuits |
Chapter 3, Chu's book |
VHDL: Behavioral Modeling of Sequential Circuits |
Section 3.4 -3.6, Chapter 4, Chu's book
VHDL sequential statements
|
VHDL: Finite State Machines |
Chapter 5, Chu's book
XST FSM HDL Coding Techniques
|
VHDL: Testbench Development |
|
Design Methodology |
|
FPGA Architecture Overview |
An Overview of FPGA Architectures
|
Introduction to ZYNQ |
The ZYNQ Book, Chapter 1, 2, 3
|
Embedded Memory |
XST RAM HDL Coding Techniques
7 Series FPGA Memory Resources - User Guide
|
Xilinx PicoBlaze Microcontroller: Overview |
Pong Chu's book, Chapter 14
Xilinx PicoBlaze User Guide
A quick tutorial on PicoBlaze
PicoBlaze-6 User Guide
|
Xilinx PicoBlaze Microcontroller: Interfacing
|
Pong Chu's book, Chapter 16 & 17
Xilinx PicoBlaze User Guide (UG 129) Chapter 4 & 6
|
Optimization Techniques for FPGA Design
|
Advanced FPGA Design by Steve Kilts, Chapter 1 - 3
|
Xilinx PicoBlaze Microcontroller: Instruction Set and Assembly Program Development |
PPT
|
Pong Chu's book, Chapter 15
|
High-Level Synthesis
Introduction to Vivado High-Level Synthesis
|
Introduction to High-Level Synthesis
High-Level Synthesis Blue Book
Demo of Vivado HLS on a sorting algorithm
|
IP Development - Demo
|
Creating and using custom IP blocks
The above tutorial in PDF
Files used in the demo C for SDK VHDL
|