PhD Students

Current Students

1. Matthew Lewandowski   (Fall 2013--)
   Topic Area: Secure Hardware Design
2. Noureddine Elmheraz   (Fall 2013--)
   Topic Area: Embedded Systems for Smart Transportation
3. Love Kumar Sah   (Fall 2014--)
   Topic Area: Embedded Processor Synthesis
4. Md. Adnan Zaman   (Fall 2016--)
   Topic Area: Memristive Systems
5. Rajeev Joshi   (Fall 2016--)
   Topic Area: Deep Learning on FPGAs
6. Omkar Dokur   (Spring 2019--)
   Topic Area: Smart Transportation (Autonomous Vehicles)
7. Lakshmi Kavya Kalyanam   (Spring 2018--)
   Topic Area: Machine Learning in Hardware

Past Students

1. Dr. Vishalini Laguduva January 2018 -- Summer 2020
   Dissertation Title: Machine Learning for the Internet of Things: Applications, Implementation and Security
   First Employment: Visiting Assistant Professor, Oklahoma State University, Stillwater, OK.
   
2. Dr. Sheikh Ariful Islam Fall 2014 -- Summer 2020
   Dissertation Title: Behavioral and RT-level Synthesis of Secure Nano VLSI Digital ASIC Designs
   First Employment: Assistant Professor, University of Texas, Rio Grande Valley.
   
3. Dr. Rekha Govindraj Summer 2016 -- Summer 2018
   (co-advised with Dr. Swaroop Ghosh, Penn. State University)
   Dissertation Title: Emerging Non Volatile Memory Technologies for Computing and Security
   First Employment: Apple, Inc, San Jose, CA.
   
4. Dr. Evren Bozgeyikli (Co-advised by Dr. A. Raij)   (Fall 2014--Fall 2016)
   Dissertation Title: Locomotion in Virtual Reality for Room Scale Tracked
   Areas for Neurotypical Individuals and Individuals with ASD
   First Employment: TBA
5. Dr. Lal Bozgeyikli (Co-advised by Dr. A. Raij)   (Fall 2014--Fall 2016)
   Dissertation Title: Virtual Reality for Training Individuals with
   Autism Spectrum Disorder: Design Considerations
   First Employment: TBA
6. Dr. Santosh Aditham Fall 2012 -- Spring 2017
   (Co-advised with Dr. N. Ranganathan, CSE, USF)
   Dissertation Title: Mitigation of Insider Attacks for Data Security in Distributed Computing Environments
   First Employment: Juniper Networks, San Jose, CA.
7. Dr. Shilpa Pendyala   (Fall 2009--Fall 2015)
   Dissertation Title: Synthesis Techniques for Sub-threshold Leakage
   and NBTI Optimization in Digital VLSI Systems
   First Employment: Intel, Portland, OR
8. Dr. Soumyaroop Roy (Co-advised with Dr. N. Ranganathan)
   (Summer 2005--Summer 2010)
   Dissertation Title: Architecture and Compiler Support for Leakage Reduction
   Using Power Gating in Microprocessors
   Reconfigurable Hardware
   First Employment: AMD, Austin, Texas.
9. Dr. Pradeep Fernando (Summer 2005--Fall 2009)
   Dissertation Title: Genetic Algorithm Based Design and Optimization of VLSI ASICs and
   Reconfigurable Hardware
   First Employment: Post Doc, EPFL, Lausanne, Switzerland.
10. Dr. Hariharan Sankaran (Spring 2003 - Fall 2008)
    Dissertation Title: High-Level Synthesis Framework for Crosstalk Minimization in VLSI
    ASICs
    First Employment: Synopys, Bangalore, India.
11. Dr. Vyas Krishnan (Spring 2003 - Fall 2008)
    Dissertation Title: Temperature And Interconnect Aware Unied Physical And High Level Synthesis
    First Employment: Assistant Professor, St. Leo University, Tampa, FL.
    
12. Dr. Suvodeep Gupta (Spring 2002 - Fall 2004)
    Dissertation Title: Behavioral and RT-level Cross-talk Estimation and Optimization in VLSI ASICs
    First Employment: Intel, Phoenix, AZ.
13. Dr. Hao Li (Co-advised with Dr. W-K. Mak) (Fall 1999 - Fall 2004)
    Dissertation Title: Low Power Technology Mapping and Performance Driven Placement for
    Field Programmable Gate-Arrays
    First Employment: Assistant Professor, CSE, University of North Texas at Denton.
    Currently working for Synopsys Inc, San Jose, CA.
14. Dr. Chandramouli Gopalakrishnan (Spring 2000 - Fall 2003)
    Dissertation Title: High Level Techniques for Estimation and Optimization
    of Leakage Power of VLSI ASICs
    First Employment: CADENCE, Noida India.
    Currently working for Synopsys Inc, Bangalore, India.
15. Dr. Stelian Alupoaei (Summer 1999 - Spring 2003)
    Dissertation Title: Interconnect-centric Macrocell Placement Approaches in DSM Regime
    First Employment: Intel, Portland, OR.

MS Students

Past Students

1. Mark La Spina (Spring 2009--present)
   Topic: Parallel implementation of Genetic Algorithms
   
2. Ananth Durbha (Summer 1998 - Fall 1999)
   Thesis Title: A Novel Route-and-Place RTL Design Methodology for Interconnect Opti-
   mization in DSM Regime.
   First Employment: Intel Corporation, Santa Clara, CA.
3. Smitha Myneni (Fall 1997 - Spring 2000)
   Thesis Title: Development of Accurate Power Simulator using hierarchical VHDL Speci-
   cation.
   First Employment: Intel Corporation, Santa Clara, California.
   
4. Chandramouli Gopalakrishnan (Fall 1997 - Fall 2000)
   Thesis Title: Power Optimization via Input Transformations.
   Continued for a doctoral degree.
   
5. Gayatri Garudadri
   Project Title: Register Transfer (RT) Level Simulation of the MIPS Pipelined Processor in
   JAVA.
   First Employment: Software Company, Tampa, Florida.
   
6. Suvodeep Gupta (Fall 1999 - Spring 2002)
   Thesis Title: Force-directed Scheduling for Dynamic Power Optimization.
   Continued for a doctoral degree.
   
7. Joe Rogers (Fall 1998-Summer 2002)
   (Co-advised with Dr. Ken Christensen)
   Thesis Title: Network Trac Study of Internet2.
   First Employment: Academic Computing, USF.
   
8. Praveen Samudrala (Fall 2001 - Spring 2003)
   Thesis Title: Selective Triple Modular Redundancy based Single Event Upset (SEU) Miti-
   gation for FPGAs
   First Employment: SpaceMicro Corporation, San Diego.
   Currently working for Qualcomm, San Diego.
   
9. Praveen Bamini (Fall 2001 - Fall 2003)
   Thesis Title: Implementation of a Speech Synthesis System.
   First Employment: Verizon, Tampa, FL.
   
10. Anulekha Bilhanan (Fall 2001 - Spring 2004)
    (Co-advised with Dr. John Heine, Mott Cancer Research Institute)
    Thesis Title: Implementation of Mammograph analysis algorithms on FPGA.
    First Employment: Fischer Imaging Inc, Denver, CO.
    
11. Umadevi Kailasam (Fall 2001 - Spring 2004)
    Thesis Title: High Level VHDL Modeling of a Low-Power ASIC for a Tour Guide.
    First Employment: Golden Gate Technology, San Jose, CA.
    
12. Viswanath Daita (Fall 2002 - Fall 2004)
    (Co-advised with Dr. Wilfredo Moreno, EE, USF)
    Thesis Title: Behavioral VHDL Implementation of Coherent Digital GPS Signal Receiver.
    
13. Ranganath Gopalan (Fall 2002 - Spring 2005)
    Thesis Title: Behavioral Synthesis of Low Leakage Pipelined Datapaths
    First Employment: Intel, San Jose, CA.
    
14. Hariharan Sankaran (Fall 2001 - Summer 2005)
    Thesis Title: System level energy optimization for location aware computing.
    Continued for a doctoral degree.
    
15. Sujana Kakarla (Fall 2003 - Spring 2005)
    Thesis Title: Partial Evaluation Based Triple Modular Redundancy for SEU Mitigation.
    
16. Supriya Sunki (Fall 2003 - Summer 2005)
    Thesis Title: Performance optimization in three-dimensional programmable logic arrays
    (PLAs).
17. Pradeep Fernando (Fall 2003 - Summer 2005)
    Thesis Title: Genetic Algorithm Based Two-Dimensional and Three-Dimensional
    Floorplanning for VLSI ASICs
    Continued for a doctoral degree.
18. Soumyaroop Roy (Fall 2003 - Summer 2005)
    (Co-advised with Dr. N. Ranganathan, CSE, USF)
    Thesis Title: A Compiler Based Leakage Reduction Technique by Power-Gating
    Functional Units in Embedded Microprocessors
    Continued for a doctoral degree.
19. Nagalakshmi Subramanya (Spring 2007 - Summer 2008)
    (Co-advised student with Dr. R. Tripathi, CSE, USF)
    Thesis Title: Study of FPGA implementation of entropy norm computation for IP data
    streams